Senior Verification Engineer
As an experienced Verification Engineer, you will be part of the FPGA Prototyping verification team, focusing on verification of SoC, and RTL designs that are modified for FPGA implementation. If you’re looking for a role that combines hardware and software skills, within a team that builds innovative FPGA solutions then please read on!
The role will involve developing the SoC verification testbench, writing Testcases in C, creating test-plans, and developing tools for the automation of tasks, together with creating verification strategies to ensure thorough testing of the assigned SoC module and automating test cases to improve verification efficiency and coverage.
To succeed in this role, you will need to have proven experience of SoC Verification (using C Testcases), SystemVerilog, Verilog, VHDL skills, alongside experience of computer architecture and scripting languages. Strong stakeholder engagement skills are also required.
Interview Process
The interview process will consist of 2-3 stages, comprising a discovery call, tech test, architectural design exercise, and a two-way Q&A with the team.
Other
Hybrid working places are in place for this role, with 2 days onsite (Cambridge or Manchester) required each week.
If you have the required verification experience and want to be part of a team that helps build innovative products that impact millions of people, then we would love to hear from you and tell you more about the role!